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3.18.1 Port 32A

Port 32A on the XS1-L device is a 32-bit wide port that has several separate signal

bit signals connected to it, accessed by multiple cores. To this end, any output

to this port must be read-modify-write i.e. to change a single bit of the port, the

software reads the current value being driven across 32 bits, ﬂips a bit and then

outputs the modiﬁed value.

This method of port usage (i.e. sharing a port between cores) is outside the

standard XC usage model so is implemented using inline assembly as required.

The peek instruction is used to get the current output value on the port:

/* Peek at current port value using port 32 A resource ID */

asm ( " peek %0, res [%1] " := r "( x ):" r "( X S1_PORT_32A ) );

The required output value is then assembled using the relevant bit-wise operation(s)

before the out instruction is used directly to output data to the port:

/* Output to port */

asm ( " out res [%0] , %1" ::"r " ( X S 1 _ P O R T _32A ) ,"r " (x ) ) ;

The table Figure 26 shows the signals connected to port 32A on the USB Audio

Class 2.0 reference design board. Note, they are all outputs from the XS1-L device.

Pin Port Signal

XD49 P32A0 USB_PHY_RST_N

XD50 P32A1 CODEC_RST_N

XD51 P32A2 MCLK_SEL

XD52 P32A3 LED_A

XD53 P32A4 LED_B

Figure 26:

Port 32A

Signals

3.18.2 Clocking

The board has two on-board oscillators for master clock generation. These produce

11.2896MHz for sample rates 44.1, 88.2, 176.4KHz etc and 24.567MHz for sample

rates 48, 96, 192kHz etc.

The required master clock is selected from one of these using an external mux cir-

cuit via port P32A[2] (pin 2 of port 32A). Setting P32A[2] high selects 11.2896MHz,

low selects 24.576MHz.

The reference design board uses a 24 bit, 192kHz stereo audio CODEC (Cirrus

Logic CS4270).

The CODEC is conﬁgured to operate in stand-alone mode meaning that no serial

conﬁguration interface is required. The digital audio interface is set to I2S mode

with all clocks being inputs (i.e. slave mode).

REV 6.1

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